The latest development of multi-purpose crystalline silicon in the United States

Abstract A research group of the Center for Nano Engineering Research (CRNE) and researchers from the Department of Electrical Engineering at the University of Barcelona have developed a more convenient and cheaper method for preparing crystalline silicon. Their research results are published in the latest issue of the Journal of Applied Physics. This very thin silicon...
A research group at the Center for Nano Engineering Research (CRNE) and researchers at the Department of Electrical Engineering at the University of Barcelona have developed a more convenient and cheaper method for preparing crystalline silicon. Their research results are published in the latest issue of the Journal of Applied Physics. This very thin silicon wafer is about 10 microns thick, which is expensive to manufacture but is expected by microelectronics, especially with the development of microchip three-dimensional integrated circuits. The development of silicon technology has provided a broader prospect for the development of photovoltaic technology, especially in the development of flexible batteries.


In recent years, the development of technology has brought about the development of silicon wafers in a thinner direction. The thinnest silicon wafer that can be brought by wire cutting is about 150 microns thick. It is more difficult to obtain thinner silicon wafers by wire-cutting technology, but the silicon material lost during the cutting process accounts for about half. The research team's approach differs from general wire-cutting in that it can be implemented in one step and produces more efficient, faster, and less expensive silicon wafers.

The method is based on the fabrication of many tiny pores on the surface of the material, which is aided by high temperatures during processing. The wafer segmentation process precisely controls the shape of the tiny pores. Precisely controlled pore diameters not only control the number of wafers, but also precisely control thickness and deviation. Such a sandwich-shaped silicon wafer can be peeled off by a blade shape. The expected number and thickness of wafers can be controlled very accurately. CRNE scientists can easily divide a 300 mm thick wafer into 10 thinner wafers, each between 5 and 7 mm.

Reduce the cost of industrial production

There is a growing demand for ultra-thin wafers, both in the MEMES industry and in the solar industry. Traditional silicon wafer cutting has reached a relative bottleneck stage. The thickness of silicon wafers is from 300 mm in the 1990s to about 180 mm today, and the efficiency is increasing and the cost is reduced, but it is increasingly difficult to obtain a thinner silicon wafer to further reduce the cost. The emergence of this method has well solved this demand, and although it has reached a thickness of several tens of micrometers, the ability to absorb sunlight and perform photoelectric conversion remains.

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